Accession Number ADA559438
Title Rapid Prototyping of High Performance Signal Processing Applications.
Publication Date 2011
Media Count 170p
Personal Author N. Sane
Abstract Advances in embedded systems for digital signal processing (DSP) are enabling many scientific projects and commercial applications. At the same time, these applications are key to driving advances in many important kinds of computing platforms. In this region of high performance DSP, rapid prototyping is critical for faster time-to-market (e.g., in the wireless communications industry) or time-to-science (e.g., in radio astronomy). DSP system architectures have evolved from being based on application specific integrated circuits (ASICs) to incorporate reconfigurable off-the-shelf field programmable gate arrays (FPGAs), the latest multiprocessors such as graphics processing units (GPUs) or heterogeneous combinations of such devices. We, thus, have a vast design space to explore based on performance trade-offs, and expanded by the multitude of possibilities for target platforms. In order to allow systematic design space exploration, and develop scalable and portable prototypes, model based design tools are increasingly used in design and implementation of embedded systems. These tools allow scalable high-level representations model based semantics for analysis and optimization, and portable implementations that can be verified at higher levels of abstractions and targeted toward multiple platforms for implementation. The designer can experiment using such tools at an early stage in the design cycle, and employ the latest hardware at later stages. In this thesis, we have focused on dataflow-based approaches for rapid DSP system prototyping. This thesis contributes to various aspects of dataflow-based design flows and tools as follows 1. We have introduced the concept of topological patterns, which exploits commonly found repetitive patterns in DSP algorithms to allow scalable, concise, and parameterizable representations of large scale dataflow graphs in high-level languages. We have shown how an underlying design tool can systematically exploit a high-level applicatio.
Keywords Asic(Application specific integrated circuits)
Commercial applications
Communication and radio systems
Digital systems
Dsp(Digital signal processing)
Expansion
Fpga(Field programmable gate arrays)
Gpu(Graphics processing units)
Graphics
Heterogeneity
Integrated circuits
Multiprocessors
Parallel processing
Patterns
Portable equipment
Processing equipment
Scaling factor
Semantics
Signal processing
Space exploration
Theses
Topology
Trade off analysis


 
Source Agency Non Paid ADAS
NTIS Subject Category 62A - Computer Hardware
63F - Optical Detection
45C - Common Carrier & Satellite
Corporate Author Maryland Univ., College Park. Dept. of Electrical and Computer Engineering.
Document Type Thesis
Title Note Doctoral thesis.
NTIS Issue Number 1219
Contract Number N/A

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